2013年2月18日 星期一

若功能性用語關係到發明的本質,仍有份量!(about Claims)


這是一個有關功能性用語的用處的判決

系爭專利為IBM的專利申請案:10/906,508,此案涉及一種確保記憶體測試軟體正確性的方法(METHOD AND APPARATUS FOR VERIFYING MEMORY TESTING SOFTWARE),其主張的權利範圍顯然有關於軟體專利,此案經USPTO核駁而IBM上訴至聯邦巡迴法院(CAFC)後確認,在前言(preamble)所記載的語言或是記載於權利範圍中功能性描述的內容具有專利的份量(patentable weight),特別是權利範圍中功能性用語是指出該發明的目的。

在USPTO審理階段,審查委員認為其中功能性描述為可預期的目的(intended purpose),因此應不具有實際的技術限制,如果要達到該項目的,應明確地記載在權利範圍中。到此來看,也如我認為的權利範圍應描述的方式,且依據一件2003年CAFC的案例:Minton v. Nat'l Ass'n of Securities Dealers, Inc., 336 F.3d 1373 (Fed. Cir. 2003),結論是當方法專利中"藉此"(whereby)的子句僅表達可預期的結果時,並無專利性的份量(not given weight when it simply expresses the intended result of a process step positively recited)。

進入CAFC階段時,法官同樣同意whereby子句並未有可專利份量,但對於此案在「verify the accuracy」的闡述卻與USPTO不同,認為其中的描述已經關聯到「發明的本質(essence of the invention)」,理應有權利範圍的影響,其中引用CAFC2010年的案例:Vizio, Inc. v. Int'l Trade Comm'n, 605 F.3d 1330 (Fed. Cir. 2010),若"for..."用語適當地界定該發明,並非僅是可預期的目的或是使用的描述。

此案的爭議源自USPTO引用US5,912,901對比10/906,508的Claims 1, 9, 17,USPTO認為各項前言「A method for "verifying the accuracy of logical-tophysical mapping software" designed for testing memory devices」並未限制權利範圍,因此解釋權利範圍並不包括for verifying the accuracy...的內容,因此認為系爭專利不具新穎性,但申請人上訴答辯此目的與引證案不同,CAFC認為USPTO並未能證明引證案已經揭露此目的,僅為透過比對記憶內容偵測記憶體錯誤,而非用於確認軟體的正確性,兩者有區隔。

系爭專利權利範圍在前言的部份寫出其技術目的,根據爭議內容,與引證案僅有此目的的差異,而此爭議僅涉及新穎性的核駁意見(anticipation rejection)

1. A method for verifying the accuracy of logical-to-physical mapping software designed for testing memory devices, said method comprising:
providing a built-in self test (BIST) fail control function to generate multiple simulated memory fails at various predetermined locations within a memory array of a memory device;
testing said memory array via a memory tester;
generating a bit fail map by said logical-to-physical mapping software based on all memory fails indicated by said memory tester, wherein said bit fail map indicates physical locations of all fail memory locations derived by said logical-to-physical mapping software; and
comparing said fail memory locations derived by said logical-to-physical mapping software to said various predetermined memory locations to verify the accuracy of said logical-to-physical mapping software.


9. A computer program product residing on a computer usable medium for verifying the accuracy of logical-to-physical mapping software designed for testing memory devices, said computer program product comprising:
program code means for utilizing a built-in self test (BIST) fail control function to generate multiple simulated memory fails at various predetermined locations within a memory array of a memory device;
program code means for testing said memory array via a memory tester;
program code means for generating a bit fail map by said logical-to-physical mapping software based on all memory fails indicated by said memory tester, wherein said bit fail map indicates physical locations of all fail memory locations derived by said logical-to-physical mapping software; and
program code means for comparing said fail memory locations derived by said logical-to-physical mapping software to said various predetermined memory locations to verify the accuracy of said logical-to-physical mapping software.


17. A built-in self-test (BIST) unit for verifying a logical-to-physical transform algorithm designed to test integrated circuit memory devices, said BIST unit comprising:
a built-in self test (BIST) fail control module for generating a plurality of simulated memory fails at various predetermined locations within a memory array of a memory device;
means for testing said memory array via a memory tester;
means for generating a bit fail map by said logical-to-physical mapping software based on all memory fails indicated by said memory tester, wherein said bit fail map indicates physical locations of all fail memory locations derived by said logical-to-physical mapping software; and
means for comparing said fail memory locations derived by said logical-to-physical mapping software to said various predetermined memory locations to verify the accuracy of said logical-to-physical mapping software.


結論:此爭議僅涉及anticipation(新穎性),並未討論到顯而易見性(obviousness),因此目前駁回USPTO的決定仍未證明系爭專利具有專利性,僅證明CAFC的態度是涉及發明本質的功能性用語仍有效力,至少可用於證明新穎性!

顯然CAFC法官認為前言或是whereby中功能性敘述對權利範圍仍有影響,不過僅有關連到發明本質的部份有用,對於解釋專利範圍在法院階段給予申請人有較多的解釋空間,不過也不會太廣,但是對於USPTO審理階段,仍應該在權利範圍中(元件描述)完整描述整個發明,而避免僅用功能性用語,避免過於模糊的地帶。然而,其實權利範圍仍可接受功能性用語,至少美國專利法如第112(f)條讓申請人以功能性語言描述權利範圍,但趨勢並不鼓勵。

Ron
資料參考:Patently-O, CAFC

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